This week we welcome Reynaldi, Yoshio, Rex and Marcel at AimValley.
Reynaldi Cangga Putra joined the hardware team.
He has a Master’s degree in Computer Engineering from the Delft University of Technology with experience in VLSI design and Electronic Design Automation.
Reynaldi will be deployed on general design activities to gain experience and practical skills required for an allround AimValley hardware engineer.
Rex and Yoshio have joined the ASIC/FPGA team.
Both have attended the FPGA workshop in May and will continue their internships at AimValley. They will be working on turning the EX5 platform into a demonstration set-up. The App will show the status of the traffic generators/monitors on the EX5 platform.
Rex Fleur is in his last year Computer Engineering at the Amsterdam University of Applied Sciences. He will be adding hardware assisted traffic generation/monitoring functions to the platform. He will be using the microblaze in the FPGA in conjunction with programmable logic in the FPGA.
Yoshio Schermer is in his 2nd year Computer Engineering at the Amsterdam University of Applied Sciences. He will build an application which runs on a mobile device and connects to the microblaze running in the FPGA.
Marcel Wilgenburg has joined the software team. Marcel is in his 3rd year Software Engineering at the Amsterdam University of Applied Sciences. During his internship he will investigate options to store data in a database external to the embedded system with the aim to improve system performance. He will also develop a prototype that will be used by AimValley as basis for future customer product development.