Internships & Graduation Projects
When it comes to Technology, Customers, or Engineers, AimValley is looking towards the future!
Our business is about people and our teams are dynamic, skilled, and passionate about delivering high-quality products and ICT solutions to our customers. Recruiting and training the right talent is an essential part of the AimValley strategy.
An internship or graduation project at AimValley gives you the opportunity to get to know our fields of expertise and get a better understanding of your own skills and ambitions in a professional setting.
You may work on an internal assignment, help out with an actual customer project or develop a new feature set for our existing products. We can tailor our projects to your individual study requirements.
We have strong ties with the Universities of Applied Science of Amsterdam, Utrecht and Windesheim. Our CEO is even part of the exam board of the Amsterdam University of Applied Sciences.
There are always plenty of ideas and projects available.
Here’s an example!
Choose your project!
AimValley’s AimOS software stack, runs on a standard Debian desktop environment in a rootless docker container and is set up to mimic the target environment as closely as possible. The next step is to run the simulation on a virtualized target environment on the desktop.
The goal of the assignment is to investigate a possible setup of a virtualized target environment on a Debian desktop.
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10G Packet Test Generator
Make a 10G Ethernet data generator/analyzer using the AimValley hardware platform. All 4 10G ports shall be able to generate and analyze Ethernet at wire speed. On the AimValley platform there is an FPGA available for this task. Move the SNT controller from a SoftCore to the local processor. The CPU shall communicate to the FPGA via the PCIe bus. Make/port a web GUI that is based on the SNT GUI that runs on the local processor of the AimValley platform. Linux is running on the local processor.
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AimValley has a long experience with system development, where FPGAs and processors are used. It is useful to have a SoC where the CPU communicates directly to the FPGA logic, without the need for a dedicated CPU interface, like SPI or PCIe.
This assignment aims to get a better understanding of using a streaming interface like AXI to directly communicate with the on-die processor. You will need to create a test design in the FPGA logic of a SoC and develop and document the interface between the FPGA logic and the ARM core.
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For Requirements Engineering AimValley uses Open Soure text editors, complemented with in-house developed scripts (based on CPAN Perl-libraries) to enforce the syntactic rules and to create trace matrices between Product/Release and Requirements.
The goal of the project is to replace the current functionality with a better-performing one;
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Apply for a project!
Current Projects in Progress
AimValley is developing an interoperability service for medical device manufacturers, using the new SDC standard.
The project aims to gather sufficient information about the current hospital networks, considering components, such as security, data exchange, etc.
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The latest AMD Versal ACAP FPGAs are build around a Network-on-Chip (NoC). This NoC is designed for high bandwidth connectivity within the FPGA. However, bandwidth is not the only parameter. Also latency and the ability to handle many small chunks of data are key parameters.
Goal of the assignment is to investigate the capabilities of the NoC and build test designs.
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The DSP elements in an FPGA contain several sub-components like flip-flops, muxes, adders, multipliers and bitshifters. These elements are less configurable, but can run on higher frequencies. FPGA synthesis tools do not recognize constructions in source-code. Rewriting source-code into functionally equivalent variants might enable DPS element recognition by FPGA tools.
The assignment is to investigate alternative functions which can be implemented using DSPs.
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With over 90 employees doing complex R&D tasks in a hybrid environment of Windows clients and Linux servers, a secure IT infrastructure is essential. One of the major threats is a randomware infection. An EDR or MDR solution for both clients and servers is considered.
The assignment is to first define the attack simulation tests, following all typical phases of an attack. Based on the results a recommendation should be given on possible further improvement of the EDR solution.
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Share our projects:
Past Projects
- Smart Assembly Checking using Machine Learning
- Smart Application Monitoring 2
- Smart Application Monitoring 1
- Smart Manufacturing
- Discrete Telecom Interface
- Metadata collection
- Configuration Validation
- Wireshark Hardware Packet Capture
- Open Source Softcore
- Flexible SFP Storage Unit
- CVE Test Automation
- Smart Network Tool
- Enhancing Smart Network Tool
- Open WRT
- AimOS built-in Self Test
- Redis for AimOS
- gRPC for AimOS
- Energy Efficiency
- Web & REST Security Analysis
- SNT Meta Driver
- AimOS Devlopment Kit R2
- AimOS Monitoring
- Bluetooth Dongle
